Home / MicroSys: How HyperLynx allowed MicroSys to design System on Module products with fast DDR4 and SerDes interfaces

MicroSys: How HyperLynx allowed MicroSys to design System on Module products with fast DDR4 and SerDes interfaces

In this Success Story, we will see how HyperLynx allowed MicroSys to design System on Module products with fast DDR4 and SerDes interfaces and how the Cadlog staff made possible this achievement.



Since 1975, MicroSys Electronics GmbH designs and develops embedded systems and devices. Products span from System on Modules up to fully integrated systems. Applications fit the automation, avionics, automotive, medical,  railways & transportation, construction, and defense market segments.

Associated norms, like IEC61508, DO-160, EN50155 are addressed in close cooperation with MicroSys' clients.

The miriac™ System on Modules utilizes processors for embedded solutions offered under e.g. NXP QorIQ PPC, Layerscape (ARM), or the i.MX (ARM) portfolio. With their low power consumption and compact dimensions of a credit card, they fit demanding environments.

Operating systems such as Linux, our own RTOS Microware OS-9,  VxWorks, QNX, or WinCE are supported.


The Challenge

MicroSys builds System On Modules and Single Board Computer products with Processors and Micro-Controllers utilizing fast interfaces to DDRx Memories as well as fast differential signals based on SerDes Technology with speeds in the Gbps range.

For a new product generation, a novelty was the size and speed of the DRAM.

With a speed of up to 3200 Mbps and a size of up to 128 GByte, attention was paid here to ensure that this connection can be used to the maximum possible extent.

Such fast signals - fast in terms of clock speeds and fast in terms of signal-edge transitions rates - must be transmitted on the compact board with as little interference as possible. In addition, the signals are also transmitted to the baseboard via high-density, high-speed connectors.

microsys miriac

The Solution

Already in the concept phase, MicroSys dealt with the topic of preliminary planning of high-speed interfaces.

“The support of Mr. Hartmann from Cadlog was an important part of this. Extremely good solution orientation distinguished the support. For example, the DRAM simulation tool HyperLynx DDRx Wizard was implemented in close cooperation with Cadlog.”, explains MicroSys.

The first task was to summarize the constraints for the layout designer in such a way that it’s possible to realize the routing right from the start in such a way that the probability of later adjustments after a  post-layout check is kept as low as possible.

During the pre-planning phase, MicroSys concentrated on two things: high-speed DDR4 and SerDes interfaces.

“With the assumption of possible placement and a predefined layer stack, we used HyperLynx LineSimto perform a pre-layout-simulation, which confirmed the feasibility to the hardware developers.”

During the layout phase, MicroSys made a Post-Layout Simulation utilizing HyperLynx BoardSim to check already routed parts.

At first, they concentrated on the SerDes interfaces and verified component placement, differential-pair routing, routing thru Via, and confirmed the need of back drilling. The next step was to verify the DRAM  interface.

MicroSys was always able to give feedback to the PCB layout designer about signal integrity and also about compliance with the given design rules.

“After a successful layout of the DRAM interface, we used the HyperLynx DDRx Wizard to confirm the functionality (signal integrity and timing).”

The finished routing was checked for possible signal integrity problems: Clocking, RGMII, SDHC,  connection to CPLD, and more. Extensive use was made of the possibility of using existing IBIS and  Touchstone/Spice models for testing to prevent redesign.

In the end, it became clear that the use of HyperLynx made it possible to answer many questions in advance, which was also confirmed by practical measurements and functionality testing. It can also be said that not only the routing but also e.g. the choice of material for the PCB could be chosen.

The simulation of the signals was given high priority. Besides the layout, this also had an impact on the material selection and layer structure of the PCB. HyperLynx, purchased from the company Cadlog, was used here.

hyperlynx ddrx wizard

The Benefits

The benefits of using a software like HyperLynx can be summarized as follows:

  • Confirmation that hardware products can run robustly in a wide operating range, eg. in terms of temperature.
  • The manufactured hardware is subject to tolerances in manufacturing. For example, how tightly the impedance of the traces on the PCB is controlled. HyperLynx helps to validate all this.
  • Building a “Digital Twin” of the product enables to validate the product’s performance by means of simulation in respect to manufacturing tolerances and operating corner cases of semiconductor components.

Apart from that, many component suppliers of CPUs or DDRx-Memories write in their Application notes “we recommend to do simulation”.

Simulation of a “Digital Twin” is an appropriate means to bring products to market which operate robustly
and reliable within the specified operating conditions and even beyond.

Now those simulation models do exist for the CPU board, MicroSys’ customers can simulate the performance of the final product consisting of CPU Module and Carrier board when doing a carrier board design.

Digital Twin of a car

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