Xpedition Enterprise

Create and replace Physical Reuse Sources and Instances

• Quickly create new Sources from Instances in the design
• Select an Instance and create a new Source by using the
• existing “Create Physical Reuse Source” command
• The new Source is easily modified and quickly published
• The existing ECO->Replace Cell feature has a new option that allows the replacement of an existing Physical Reuse Instance with a different source Physical Reuse Circuit

Increased control of Cell text edits

Physical Reuse Circuits often have congested areas of components. In these cases, moving and deleting silkscreen text is required to make the silkscreen information more legible. The changes made in the Source often need to be included in the Instances

• In previous releases, the text movement in the Source was included in the Instance when the “Keep Cell text attributes” option was enabled. However, deleted text was not maintained and would reappear in the Instance
• When enabled, the new “Use Cell text modifications from Source” option will ensure that deleted text in the source is also removed in the instance
• The Cell text options enabled during initial placement of the Instance are maintained during all update operations
• As in previous releases, the Cell text options apply to Part Numbers and Reference Designators on the Silkscreen and Assembly layers

• Allow mirroring of Physical Reuse Circuits containing special cells
• Support RF, Buried, Tiebar, and Drawing Cells
• Typically for Physical Reuse Circuits which are embedded and do not have off-the-shelf parts
• Improve handling of traces, vias, planes, and drawing objects in groups
• Help ensure that editing of these items doesn’t remove the items from their groups after being unfrozen
• Improves stability of group contents when groups must be modified

Move tuning patterns along a trace and jump to next segment when necessary

• Makes it easier to fit new tuning patterns into densely routed areas by moving existing tuning to make room
• Includes odd angle support for single-ended and diff pair traces
• Optional control of push and shove behavior of surrounding traces and viasImprove handling of traces, vias, planes, and drawing objects in groups

Enhance Gloss to clean up existing DRC clearance violation

• Clean up violations when possible. Previously, Gloss would not modify traces containing violations.
• In some cases where the violation cannot be completely removed, violations will be minimized, making it easier to correct the violation manually

Route Escapes for Sketch PlansLoad time decreased up to 90% on some designs

• Create and optimize route escapes from components to the edge of a rule area
• This feature allows you to reduce routing length and improve bus routing percentages by ensuring all pins can be routed to the edge of the Rule area before routing the full Sketch Plan.

Once the escapes are optimized at the edge of the rule area, the Sketch Router can be used to finish the connections using the Sketch Plan.

Continue to improve load and save performance on very large designsMakes it easier to fit new tuning patterns into densely routed areas by moving existing tuning to make room

• Load time decreased up to 90% on some designs.
• Up to 95% improvement in save time on some specific designs

Improve DRC Connectivity performance in Batch DRC

• Up to 57% improvement in time spent checking connectivity

Complex Vias

• Update Component Explorer cross-probing so selecting any object associated with a complex via will show that complex via selected in the Other tab. Currently you must select the Complex Via group outline to cross probe into Component Explorer

Enhanced Placement of Manage Blocks

• Update Component Explorer to allow sequential placement of multiple Managed Blocks
• Placement process is much more efficient when a design contains numerous Manage Blocks

Plane Shape Priorities in Reuseable Circuits

• Change applies to Cells, Managed Blocks, and Physical Reuse technology.
• When Reusable Circuits containing plane shapes overlap other Reusable Circuits containing plane shapes, the plane shape behavior is more predictable
• In previous releases, the plane data generation in these cases could depend on the placement or update order of the circuits

Note: Existing designs may have changes to plane generation when plane shapes in multiple Reusable Circuits overlap. Any design which was released should have its planes changed to static before opening in this release

Enhanced import pins capability in Cell Editor

• Manually placing hundreds of pins in large Cells can be time consuming. The cell X-Y pin locations typically can be copied from a component datasheet into a CSV file
• The previous Die Wizard functionality has been renamed to Import Pins to support Import Pins as a general function. It has been updated to allow pin import of normal surface mount padstacks
• The list of available padstacks for import now includes SMD and die padstacks supported in previous releases
• The location of the command in the Cell Editor toolbar has not changed

Support Device Internal connectivity in XPCB when Design type is set to Package

• Previously, this capability was only available in Xpedition Package Designer; now, this feature is available in Xpedition 301 for package design types

Support Device Internal connectivity on all pins instead of only die pins

• This capability now considers all pins defined in the side file
• For example, Embedded dual sided dies use SMD pins in the cell and therefore this capability did not work with such components in previous releases. The SMD pins are now supported

Provide definitive cell and model identification within IDX exchange files to ensure

model alignment between Layout, NX, EDM, and Teamcenter

• Ensures cell/model alignment is accurate, even when alternate cells are in use

Supports two use cases

• For initial placement within Layout, the full "cell key" will be populated into ECAD/MCAD exchange IDX files for use by NX, which will have EDM-provided information to dictate the specific model to be used
• For initial placement within NX, Teamcenter will provide EDM-provided information to the user, enabling the choice of available 3D models, even when alternate cells are involved. MCAD Collaborator will access the EDM cache to derive the proper cell to be used based upon the model and part number

Recognize additional changes for proposals

Recognize when changes have occurred, and include in proposals:

• Reference designator renumber
• Ownership change to components
• Change of cell name used for a give component
• Placement room name alteration

Conductive shape netname change

Improve overall stability and reliability of Managed Blocks including Nested Managed Blocks

• Fix various crashes, non-responding state cases and exceptions to provide more stable solution
• Get rid of some misleading and inconsistency behaviors (for instance in Dissolve command, Search window, Diagnostics utility) to provide more predictable behaviors
• Introduce progress bars for longer-running Place and Update operations
• Some improvements are not just Nested Managed Block specific, rather they are generic and apply to any Managed Blocks

Specific customer-driven enhancements to the VX.2.11/VX.2.12 variant support in EDM Collaborate

• Ensure symbol replacements (their positions/orientations, visibility of properties) exported in CCE file and presented in EDM Collaborate schematic view match the variant schematic view in Designer
• Introduce some additional tactical improvements in this area

Ensure unified and secure authentication method in EDM ecosystem

Kerberos authentication support in Databook and Search

• Enhance the login mechanism, that is used by Databook and Search windows to authenticate to EDM server
• Support the EDM Shared Session mechanism to not authenticate a user who is already authenticated
• Enhance the existing mechanism to store credentials

First General Release of the enhanced ICD flow supported by library cables

Improve the existing ICD flow to minimize the need for person-to-person communication between system hardware engineers (Xpedition) and E/E designers (Capital) and thereby reduce opportunities for human errors

• Provide access to Capital multi-core cable definitions in Xpedition System Designer (in the Search window) to let System Designer user to search, select and place logical and graphical representations of multicore cables
• Avoid time-consuming and error prone manual process to define cable structures
• Place pre-defined library cable structures as ‘read-only’ objects
• Ensure multicore-cable-driven system interconnectivity is correctly (correct-by-construction) exported in ICD file
• Deliver selected improvements to the Controlled Release functionality to meet criteria of General Release
• Address critical Beta feedback
• Detect out-of-date cable instances