FPGA Design Verification with Questa Prime
A flexible automated solution for Verification Management
The Questa verification solution is an assemblage of technologies, methodologies, and libraries for modern ASIC and FPGA design verification.
Why choose Questa Prime for FPGA Design Verification?
Highly productive advanced verification solution with verification management for coverage closure of large, complex electronic systems.
Easy to Use
Easy to use, fast time-to-debug through native assertions, and a complete multi-abstraction and multi-language debug environment including transaction-level debug.
Automated Test Development
Constrained-random stimulus generation to automate test development.
Native advanced SystemVerilog testbench capabilities with OVM and UVM combined with unique debug function to ease the development and debug of advanced testbenches.
This report presents the results from the 2020 Wilson Research Group Functional Verification Study focused on the Field-Programmable Gate Array (FPGA) segment. The findings from this study provide invaluable insight into the state of today’s FPGA market in terms of both design and verification trends.
High Performance and Capacity in FPGA Design Verification
The Questa Advanced Simulator for FPGA Design Verification achieves industry-leading performance and capacity through very aggressive, global compile and simulation optimization algorithms of SystemVerilog and VHDL, improving SystemVerilog and mixed VHDL/SystemVerilog RTL simulation performance by up to 10X. Questa also supports very fast time-to-next simulation and effective library management while maintaining high performance with unique capabilities to pre-optimize and define debug visibility on a block by block basis enabling dramatic regression throughput improvements of up to 3X when running a large suite of tests.
To increase simulation performance for large designs with long simulation times, Questa also has a Multi-Core option. Questa Multi-Core takes advantage of modern computing systems by partitioning the design to run in parallel on multiple CPUs or computers using either automatic or manually driven partitions. To achieve even greater performance, Questa supports TBX; the highest performance Transaction Level link to the Veloce platform enabling a 100x increase in performance with debug visibility and a common testbench.
Discover the Questa Verification Solution
Learn how and why Questa is the Industry-Leading Solution for Verification
Tools for Simulation and Verification
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