Home / Questa AutoCheck

Questa AutoCheck

A fully automatic formal bug hunting app that finds bugs due to common RTL coding errors

Questa AutoCheck helps you to find bugs early in your design. It automatically generates properties to support an ever-growing variety of static and dynamic checks such as dead code analysis, finite state machine deadlock, combinatorial loops, and liveness; covering common design errors and unimagined corner cases.

Questa Formal Solutions

Questa AutoCheck is provided by Siemens Digital Industries. It is part of the Questa Formal Solutions, which gives the "Power of Formal" both to everyone and to experts.

Understanding formal methods for use in DO-254 programs

White Paper

This paper seeks to take the mystery out of the use of formal methods for hardware verification. In this discussion, we will first explain formal methods as clearly and concisely as possible. We will then look at the state of the industry and the changes over the last decade or so that have enabled the widespread use of formal methods for hardware verification. With this knowledge in-hand, we will examine and explain the contents of DO-254 Appendix B 3.3.3 “Formal Methods.” Finally, we will bring this information together and provide recommendations for using formal methods on a DO- 254 project.

Questa AutoCheck Benefits

questa autocheck

Easy-to-use, push-button bug hunting

  • No knowledge of formal or ABV is required!
  • Automatic assertion creation eliminates the need to write assertions
  • Leverages the common Questa Visualizer debug platform
questa autocheck

Finds bugs early in the design cycle

  • Users can start verifying as soon as RTL code is written or changed
  • No testbench or assertions are necessary!
  • Users don’t have to bother writing simple tests
questa autocheck

Automatically improves design quality

  • Explores sequential design behavior to find corner-case bugs that will be missed by lint
  • Finds common functional design issues in registers, FSMs, buses, and memories

Find out more about lorem ipsium

Sorry, we couldn't find any posts. Please try a different search.

Find out more about Questa AutoCheck

Download the presentation to learn more about RTL debug and other features with Questa AutoCheck

Tools for Simulation and Verification

Questa CDC Verification

Questa CDC

Questa CDC by Siemens identifies errors using structural analysis to recognize clock domains, synchronizers, and...

Discover
HDL Designer

HDL Designer

HDL Designer offers a comprehensive HDL Design Environment that ensures a structured FPGA/ASIC Design Flow.

Discover
Questa Advanced Simulator

Questa Advanced Simulator

The Questa Advanced Simulator is a simulator and debug engine that reduces the risk of...

Discover
Questa Verification IP (QVIP)

Questa Verification IP

Questa Verification IP frees engineers from spending time developing BFMs, verification components, or VIP, to...

Discover
FPGA Design Verification

FPGA Design Verification with Questa Prime

The Questa verification solution is an assemblage of technologies, methodologies, and libraries for modern ASIC...

Discover
modelsim

ModelSim

ModelSim gives you a complete easy-to-use environment for Code Coverage Analysis, a prerequisite for Certifications...

Discover

Do you want to receive more information about Questa AutoCheck?

Contact us and we will answer your doubts and curiosities as soon as possible.

Book a Free Demo

PCB Data Management

Make an appointment with one of our experts to see the software in action!

The expert will show you for free how you can use it to address the specific challenges your projects bring to your team and your company.

Scroll to Top